Mask Layout Design Engineer

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Join a team recognized for leadership, innovation and diversity
The future is what you make it.
When you join Honeywell, you become a member of our global team of thinkers, innovators, dreamers and doers who make the things that make the future.
That means changing the way we fly, fueling jets in an eco-friendly way, keeping buildings smart and safe and even making it possible to breathe on Mars.
Working at Honeywell isn€™t just about developing cool things. That€™s why all of our employees enjoy access to dynamic career opportunities across different fields and industries.
Are you ready to help us make the future
Join the engineering team at Honeywell's Microelectronics facility located in Plymouth, Minnesota to support development of digital, analog, mixed signal and high bandwidth communication circuits and products for aerospace, military and high temperature applications. Relevant circuits include ASIC library cells such as logic, registers, and I/O cells; memories; op amp, ADC, DAC, PLL, SERDES and DDR3/4 circuits and supporting digital functions.  You will be responsible for IC mask design layout and physical verification ranging from test chips to complete products with work spanning cell-level to chip-level scope. You will be part of a group of highly committed professionals who provide expertise and ensure the success of engineering projects and programs.
Lead world-class project execution to supply products using silicon-on insulator technologies for 0.8um, 0.35um, 150nm, 90nm and external technologies from ON-Semiconductor and GlobalFoundries.
YOU MUST HAVE
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Bachelor€™s Degree
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4 or more years of mask layout design experience with Cadence tools and physical verification with Siemens-EDA (MENTOR) tools
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Ability and willingness to work on-site at the Honeywell Plymouth, MN facility (zip code 55441)
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US Citizenship is required
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Dual Citizenship is not allowed due to contractual requirements
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Previously held USG Secret security clearance in good standing, or no known barriers to achieve a USG Secret security clearance is required
WE VALUE
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Bachelor€™s Degree in Electrical Engineering
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Mask Layout Design experience spanning cell-level layout design to chip-level layout design & verification tasks
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Cadence Process Design Kit (PDK) experience and Virtuoso tool proficiency
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Siemens-EDA (MENTOR) Physical Verification proficiency
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Experience with and working knowledge of CMOS semiconductor technology
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Windows OS and LINUX OS and Microsoft office suite tools proficiency
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Ability and willingness to lead Mask Layout team members in formulating and deploying work-flow methods
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Experience and willingness to mentor less experienced mask layout designers
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Passion to learn and grow in the integrated circuit (IC) field
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Effective and clear communication skills and good ability to work with others
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Work accurately with excellent attention to detail
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Ability to work simultaneously on multiple projects and follow up on responsibilities
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Self-starter who requires minimal oversight 
Additional Information
JOB ID:
HRD155238
Category:
Engineering
Location:
12001 State Highway 55,Plymouth,Minnesota,55441,United States
Exempt
Must be a US Citizen due to contractual requirements.
Engineering (GLOBAL)
Honeywell is an equal opportunity employer. Qualified applicants will be considered without regard to age, race, creed, color, national origin, ancestry, marital status, affectional or sexual orientation, gender identity or expression, disability, nationality, sex, religion, or veteran status.
,title:Mask Layout Design Engineer
Categories
Engineering
Posted:
2022-02-23
Expires:
2022-03-25
Honeywell

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